9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
   assign y=a|b;

endmodule

module not_gate(input a, output y);
   assign y=~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire c,d,e,f;
    not_gate n1(a,c);
    not_gate n2(b,d);
    and_gate a1(c,b,e);
    and_gate a2(d,a,f);
    or_gate o1(e,f,y);

endmodule