9. XOR Gate Using Basic Gates

How do you plan to solve it?

module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;
endmodule

module not_gate(input a, output y);
    assign y = ~a;

endmodule

module xor_gate (
    input  a, b,
    output y
);
 wire w1,w2,w3,w4;
    not_gate n1(a,w1);
    not_gate n2(b,w2);
    and_gate a1(a,w2,w3);
    and_gate a2(b,w1,w4);
    or_gate o1(w4,w3,y);
endmodule