9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;  // Corrected from '||' to '|'
endmodule

module not_gate(input a, output y);
    assign y = ~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire y1, y2, y3, y4, y5;

    not_gate NOTA(
        .a(a),
        .y(y1)
    );

    not_gate NOTB(
        .a(b),
        .y(y2)
    );

    and_gate ABBAR(
        .a(a),
        .b(y2),
        .y(y3)
    );

    and_gate ABARB(
        .a(y1),
        .b(b),
        .y(y4)
    );

    or_gate ORF(
        .a(y3),
        .b(y4),
        .y(y5)  // Corrected port name
    );

    assign y = y5;  // Final output assignment
endmodule