wire x1,x2,x3,x4;
and_gate a1 (.a(a), .b(x1), .y(x3));
and_gate a2 (.a(x2), .b(b), .y(x4));
or_gate r1 (.a(x3), .b(x4), .y(y));
not_gate n1 (.a(b), .y(x1));
not_gate n2 (.a(a), .y(x2));
// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
assign y = a & b;
endmodule
module or_gate(input a, b, output y);
assign y=a|b;
endmodule
module not_gate(input a, output y);
assign y=~a;
endmodule
// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
input a, b,
output y
);
wire x1,x2,x3,x4;
and_gate a1 (.a(a), .b(x1), .y(x3));
and_gate a2 (.a(x2), .b(b), .y(x4));
or_gate r1 (.a(x3), .b(x4), .y(y));
not_gate n1 (.a(b), .y(x1));
not_gate n2 (.a(a), .y(x2));
endmodule