79. DFF with Synchronous Reset

How do you plan to solve it?

module dff_sync_reset (
    input  CLK,
    input  RST,
    input  D,
    output reg Q
);
    // Write your code here
    always @(*) begin
        if(RST==1) begin
            Q=0;
        end
        else if(RST==0) begin
            Q=D;
        end
    end
endmodule